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Yu's study notes

Sunday, February 4, 2007. Paper: Addressing Workload Variability in Architectural Simulations. A workload exhibits different characteristics during different phases of a single simulation run. Small timing variations cause runs starting from the same initial stat to follow different execution paths from the space of all possible paths. Running long enough ( 60s) does not easily apply to simulation because of its enormous slowdown. Use confidence intervals and hypothesis testing to evaluate the result.

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Sunday, February 4, 2007. Paper: Addressing Workload Variability in Architectural Simulations. A workload exhibits different characteristics during different phases of a single simulation run. Small timing variations cause runs starting from the same initial stat to follow different execution paths from the space of all possible paths. Running long enough ( 60s) does not easily apply to simulation because of its enormous slowdown. Use confidence intervals and hypothesis testing to evaluate the result.

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Yu's study notes | fisherduyu.blogspot.com Reviews

https://fisherduyu.blogspot.com

Sunday, February 4, 2007. Paper: Addressing Workload Variability in Architectural Simulations. A workload exhibits different characteristics during different phases of a single simulation run. Small timing variations cause runs starting from the same initial stat to follow different execution paths from the space of all possible paths. Running long enough ( 60s) does not easily apply to simulation because of its enormous slowdown. Use confidence intervals and hypothesis testing to evaluate the result.

INTERNAL PAGES

fisherduyu.blogspot.com

1

Yu's study notes: Paper: Addressing Workload Variability in Architectural Simulations

http://fisherduyu.blogspot.com/2007/02/paper-addressing-workload-variability.html

Sunday, February 4, 2007. Paper: Addressing Workload Variability in Architectural Simulations. A workload exhibits different characteristics during different phases of a single simulation run. Small timing variations cause runs starting from the same initial stat to follow different execution paths from the space of all possible paths. Running long enough ( 60s) does not easily apply to simulation because of its enormous slowdown. Use confidence intervals and hypothesis testing to evaluate the result.

2

Yu's study notes: Compile SPLASH2 on solaris 8 && cc

http://fisherduyu.blogspot.com/2007/01/compile-splash2-on-solaris-8-cc.html

Sunday, January 28, 2007. Compile SPLASH2 on solaris 8 & cc. Unpack SPLASH2 simics.tar.gz. Login to solaris computer. Ftp:/ ftp.sunfreeware.com/pub/freeware/SOURCES/m4-1.4.7.tar.gz. There is a tiff subfolder in SPLASH2 official version. Compiled it as a static .a library and link it to SPLASH2-simics’ vorlend workload. CFLAGS = -O3 -mt -D REENTRANT -I././solaris.threads -DFLIP -DPRESHD $(CDEBUG) -Ilibtiff. Vorlend need preprocessing data. Read its help to compile the application with different options.

3

Yu's study notes: Paper: Multifacet’s General Execution-driven Multiprocessor Simulator (GEMS) Toolset

http://fisherduyu.blogspot.com/2007/02/paper-multifacets-general-execution.html

Sunday, February 4, 2007. Paper: Multifacet’s General Execution-driven Multiprocessor Simulator (GEMS) Toolset. The components of GEMS toolset:. Test cache coherence protocols. Basic timing verifications (lock contention, widely-shared data). Full system functional simulator. SPARC v9 OOO simulator to provide timing and memory access flow. A domain-specific language for cache coherence protocols (invalidation-based). An accurate timing simulator for cache coherence latency simulation but slow?

4

Yu's study notes: Run SPLASH2 on Simics & Ruby

http://fisherduyu.blogspot.com/2007/01/run-splash2-on-simics-ruby.html

Sunday, January 28, 2007. Run SPLASH2 on Simics and Ruby. 1 Configure simics to 4P and create check points. Num cpus=4p / 16p, 8p too slow. Boot and Mount host disk. See simics installation doc. 2Configure and run ruby.simics. Ruby0setparam g NUM PROCESSORS 4. Ruby0setparam g MEMORY SIZE BYTES 4294967296. CHOLESKY –p4 inputs/tk29.O. RADIX –p4 –n262144 –r1024 –m524288. LU –n2048 –b16 –p4. FFT –m16 p4 –n65536 –l4. RAYTRACE –p4 inputs/car.env. RADIOSITY –p 4 –batch –room. Posted by Yu Du.

5

Yu's study notes: Paper: Recording Shared Memory Dependencies Using Strata

http://fisherduyu.blogspot.com/2007/02/paper-recording-shared-memory.html

Sunday, February 4, 2007. Paper: Recording Shared Memory Dependencies Using Strata. Previous hardware solution will record memory race log from coherence traffics. Though a technique called Netzer optimization can be used to eliminate unnecessary logs, the log size is still very large. In the paper, the author proposes an enhancement solution to shrink log size and decrease hardware cost. For the snooping implementation. For the directory implementation. Posted by Yu Du. Subscribe to: Post Comments (Atom).

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fisherduyu.blogspot.com

Yu's study notes

Sunday, February 4, 2007. Paper: Addressing Workload Variability in Architectural Simulations. A workload exhibits different characteristics during different phases of a single simulation run. Small timing variations cause runs starting from the same initial stat to follow different execution paths from the space of all possible paths. Running long enough ( 60s) does not easily apply to simulation because of its enormous slowdown. Use confidence intervals and hypothesis testing to evaluate the result.

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