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Physical Design & ASIC blog

Physical Design and ASIC blog. Wednesday, November 24, 2010. Level shifter, isolation cell. Multivoltage cells can be used in multi voltage design (Mvdd) in which there are different voltage domains. for e.g. Special cells are required for implementing a Multi-Voltage design. 3 Enable Level Shifter. 5 Always ON cells. 6 Power Gating Switches/MTCMOS switch. There are 2 types of isolation cells (a) Retain "0″ (b) Retain "1″. Always ON cells: Generally these are buffers, that remain always powered irrespect...

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Physical Design and ASIC blog. Wednesday, November 24, 2010. Level shifter, isolation cell. Multivoltage cells can be used in multi voltage design (Mvdd) in which there are different voltage domains. for e.g. Special cells are required for implementing a Multi-Voltage design. 3 Enable Level Shifter. 5 Always ON cells. 6 Power Gating Switches/MTCMOS switch. There are 2 types of isolation cells (a) Retain 0″ (b) Retain 1″. Always ON cells: Generally these are buffers, that remain always powered irrespect...

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1 1 level shifter

2 2 isolation cell

3 4 retention flops

4 thanks

5 posted by

6 kanth

7 2 comments

8 no comments

9 4 comments

10 1 comment

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1 level shifter,2 isolation cell,4 retention flops,thanks,posted by,kanth,2 comments,no comments,4 comments,1 comment,older posts,about me,lord krishna,blog archive

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Physical Design & ASIC blog | kanth-ebooks.blogspot.com Reviews

https://kanth-ebooks.blogspot.com

Physical Design and ASIC blog. Wednesday, November 24, 2010. Level shifter, isolation cell. Multivoltage cells can be used in multi voltage design (Mvdd) in which there are different voltage domains. for e.g. Special cells are required for implementing a Multi-Voltage design. 3 Enable Level Shifter. 5 Always ON cells. 6 Power Gating Switches/MTCMOS switch. There are 2 types of isolation cells (a) Retain "0″ (b) Retain "1″. Always ON cells: Generally these are buffers, that remain always powered irrespect...

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kanth-ebooks.blogspot.com

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Physical Design & ASIC blog: difference between placement blockage and Halo?

http://kanth-ebooks.blogspot.com/2010/04/difference-between-placement-blockage.html

Physical Design and ASIC blog. Thursday, April 15, 2010. Difference between placement blockage and Halo? Placement blockage and halo used to block other cell like standard cell or other macro to be placed in that area. So both placement blockage and halo have the same functionality. Subscribe to: Post Comments (Atom). View my complete profile. Placement grid, manufacturing grid explanation. Site in lef file. Physical design clean netlist. Formula to calculate the distance between adjacent.

2

Physical Design & ASIC blog: Formula to calculate the distance between adjacent macros

http://kanth-ebooks.blogspot.com/2010/04/formula-to-calculate-distance-between.html

Physical Design and ASIC blog. Thursday, April 15, 2010. Formula to calculate the distance between adjacent macros. No of pins x metal pitch. Distance between the macros = - - - - - - - - - - - - - - - -. No of metal layers used /2). Consider one horizontal and vertical metal layer as one resource. For 4 ML process, the denominator comes out to 2 and for 6 ML process it comes out to 3. Finally calculate the value for two adjacent macros by doubling the above value. June 23, 2010 at 4:27 AM. Useful AWK sc...

3

Physical Design & ASIC blog: April 2010

http://kanth-ebooks.blogspot.com/2010_04_01_archive.html

Physical Design and ASIC blog. Saturday, April 17, 2010. Placement grid, manufacturing grid explanation. The manufacturing grid is the smallest resolution of your technology process. The value can be found in the tech lef file, for example:. MANUFACTURINGGRID 0.005 ;. But I always double-check with the sign-off DRC deck to make sure this is correct. Any shapes created in your design must align to this grid, otherwise you will get DRC errors. Links to this post. Friday, April 16, 2010. Site in lef file.

4

Physical Design & ASIC blog: November 2010

http://kanth-ebooks.blogspot.com/2010_11_01_archive.html

Physical Design and ASIC blog. Wednesday, November 24, 2010. Level shifter, isolation cell. Multivoltage cells can be used in multi voltage design (Mvdd) in which there are different voltage domains. for e.g. Special cells are required for implementing a Multi-Voltage design. 3 Enable Level Shifter. 5 Always ON cells. 6 Power Gating Switches/MTCMOS switch. There are 2 types of isolation cells (a) Retain "0″ (b) Retain "1″. Always ON cells: Generally these are buffers, that remain always powered irrespect...

5

Physical Design & ASIC blog: site in lef file

http://kanth-ebooks.blogspot.com/2010/04/site-in-lef-file.html

Physical Design and ASIC blog. Friday, April 16, 2010. Site in lef file. A site is a defination (a rectangle, I think) for placing a object. For example, all the standard celll use the same site. Subscribe to: Post Comments (Atom). View my complete profile. Placement grid, manufacturing grid explanation. Site in lef file. Physical design clean netlist. Formula to calculate the distance between adjacent. Halo,blockage,fence, region definitions. Difference between placement blockage and Halo?

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Physical Design & ASIC blog

Physical Design and ASIC blog. Wednesday, November 24, 2010. Level shifter, isolation cell. Multivoltage cells can be used in multi voltage design (Mvdd) in which there are different voltage domains. for e.g. Special cells are required for implementing a Multi-Voltage design. 3 Enable Level Shifter. 5 Always ON cells. 6 Power Gating Switches/MTCMOS switch. There are 2 types of isolation cells (a) Retain "0″ (b) Retain "1″. Always ON cells: Generally these are buffers, that remain always powered irrespect...

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