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TTL: LS, FAST, AS. CMOS: HC, AC,. CPLD: MACH, MAX,. ACT, FCT, LVDS. ECL: 10K, 100K. FPGA: XILINX, ACTEL. NIOS II, PC405 cores. PECL, LVPECL, CML. More than thirty years experience designing, developing, and. Electronic equipment including analog design, high speed. And routing, digital design with standard and. PLDs to FPGAs, and microprocessor design. From micro controllers through. 32 bit RISC processors. Experienced. In worst case timing analysis, signal. Integrity analysis, testability.

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TTL: LS, FAST, AS. CMOS: HC, AC,. CPLD: MACH, MAX,. ACT, FCT, LVDS. ECL: 10K, 100K. FPGA: XILINX, ACTEL. NIOS II, PC405 cores. PECL, LVPECL, CML. More than thirty years experience designing, developing, and. Electronic equipment including analog design, high speed. And routing, digital design with standard and. PLDs to FPGAs, and microprocessor design. From micro controllers through. 32 bit RISC processors. Experienced. In worst case timing analysis, signal. Integrity analysis, testability.

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1 technologies

2 analog digital

3 programmable logic

4 processors

5 op amps

6 plds

7 filters

8 lattice altera

9 instrumentation

10 power supplies

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technologies,analog digital,programmable logic,processors,op amps,plds,filters,lattice altera,instrumentation,power supplies,altera aeorflex,tools,hdl tools,simulation tools,office tools,mentor veribest,vhdl,quartus ii,modelsim,ms word,expedition pcb,ahdl

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TTL: LS, FAST, AS. CMOS: HC, AC,. CPLD: MACH, MAX,. ACT, FCT, LVDS. ECL: 10K, 100K. FPGA: XILINX, ACTEL. NIOS II, PC405 cores. PECL, LVPECL, CML. More than thirty years experience designing, developing, and. Electronic equipment including analog design, high speed. And routing, digital design with standard and. PLDs to FPGAs, and microprocessor design. From micro controllers through. 32 bit RISC processors. Experienced. In worst case timing analysis, signal. Integrity analysis, testability.

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Analog Digital Programmable Logic Processors. Op Amps TTL: LS, FAST, AS. PLDs 80C51, Z80. PLL CMOS: HC, AC, CPLD: MACH, MAX, 80C188, SparcLite. Filters FACT, FCT, LVDS LATTICE, ALTERA. Instrumentation ECL: 10K, 100K FPGA: XILINX, ACTEL NIOS II, PC405 cores. Power Supplies PECL, LVPECL, CML ALTERA, AEORFLEX MC5200 (Power PC). HDL Tools Simulation Tools Office Tools. VHDL Quartus II ModelSim MS Word. Verilog MaxPlus II P-Spice WordPerfect. AHDL XILINX Foundation APLAC Excel. Abel 6 Renoir RFsim99.

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TTL: LS, FAST, AS. CMOS: HC, AC,. CPLD: MACH, MAX,. ACT, FCT, LVDS. ECL: 10K, 100K. FPGA: XILINX, ACTEL. NIOS II, PC405 cores. PECL, LVPECL, CML. More than thirty years experience designing, developing, and. Electronic equipment including analog design, high speed. And routing, digital design with standard and. PLDs to FPGAs, and microprocessor design. From micro controllers through. 32 bit RISC processors. Experienced. In worst case timing analysis, signal. Integrity analysis, testability.

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http://www.tommcgonigle.com/Resume.html

Contract at BAE Systems, Endicott NY (August 12 to May 13). Took over an existing design and modified it to include changes to correct defects found in prototype debug and to replace. Obsolete and obsolescent components. Worked with project management, components engineering, reliability engineering. And vendor's representatives. Worked with PCB design to do the respin. Debugged a problem with an Actel SX-A FPGA by simulating the design with Questa and reworking the VHDL code. The VHDL. Designed a miniat...

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http://www.tommcgonigle.com/Samples.html

A Sample Test Bench. A State MAchine Example. Use IEEE.std logic 1164.all;. Use IEEE.STD LOGIC UNSIGNED.all;. Use IEEE.numeric std.all;. Entity MY SM is. Port(RESET n : in STD LOGIC;. CLOCK : in STD LOGIC;. Start State Machine : in STD LOGIC;. State Advance Signal : in STD LOGIC;. Restart SM Signal : in STD LOGIC;. SM Output 1 : out STD LOGIC;. SM Output 2 : out STD LOGIC;. SM Output 3 : out STD LOGIC. End MY SM;. Architecture MY SM ARCH of MY SM is. State F, State G);. Begin - Begin Architecture. Next s...

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TTL: LS, FAST, AS. CMOS: HC, AC,. CPLD: MACH, MAX,. ACT, FCT, LVDS. ECL: 10K, 100K. FPGA: XILINX, ACTEL. NIOS II, PC405 cores. PECL, LVPECL, CML. More than thirty years experience designing, developing, and. Electronic equipment including analog design, high speed. And routing, digital design with standard and. PLDs to FPGAs, and microprocessor design. From micro controllers through. 32 bit RISC processors. Experienced. In worst case timing analysis, signal. Integrity analysis, testability.

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