craigjb.com
craigjb
http://craigjb.com/resume
Developed patented Adaptive Patterning software technology including proprietary routing and design tools for fan-out wafer-level packaging (FOWLP). Optimized design and routing software for massively parallel execution, load-balanced across multiple servers with multiple redundancy. Developed electronic design automation (EDA) support tools for integrating package design tools and data from different vendors. Developed two iPhone apps published in iTunes App Store:. Keystone Dental Abutment Wizard.
iwlpc.com
IWLPC - International Wafer Level Packaging Conference
http://www.iwlpc.com/call_for_papers.cfm
Bridging the Interconnect Gap. October 18 - 20, 2016. San Jose, California, USA. International Wafer-Level Packaging Conference. The SMTA and Chip Scale Review. Are pleased to announce plans for the 13th Annual International Wafer-Level Packaging Conference and Tabletop Exhibition. This premier industry event explores leading-edge design, material, and process technologies being applied to Wafer-Level Packaging applications. There will be special emphasis on the numerous device and end product ap...New M...
ectc.net
ECTC | IEEE Electronic Components and Technology Conference
http://www.ectc.net/sponsors/index.cfm
IEEE Electronic Components and Technology Conference. Intel Best Student Paper. Student Reception and Best Student Interactive Presentation. For more information contact:. Intel Best Student Paper. Student Reception and Best Student Interactive Presentation. About ECTC with Video.
asuresearchpark.com
ASU Research Park | Property Map
http://asuresearchpark.com/property-map
Amenities and Park Life. Build to Suit Opportunities. 8555 South River Parkway. 7700 South River Parkway. Applied Microarrays, Inc. Arizona State University Solar Power Lab. 8700 South Price Road. Bright Horizons Family Solutions, Inc. 7660 South Research Drive. 7855 South River Parkway. Titan Formwork Systems, LLC. 2055 East Technology Circle. 8620-8640 South River Parkway. Edward Jones Training Center. 8333 South River Parkway. 2150 East Warner Road. 2005 East Technology Circle. 8440 South River Parkway.
iwlpc.com
Sponsors | IWLPC - International Wafer Level Packaging Conference
http://www.iwlpc.com/sponsors.cfm
Bridging the Interconnect Gap. October 18 - 20, 2016. San Jose, California, USA. We couldn't have an event this good without the dedication and support of our sponsors and exhibitors. If you would like to see your company listed on this page, sign up to become a sponsor. Applied Materials is the global leader in providing innovative equipment, services and software to the semiconductor, flat panel display and solar photovoltaic industries. SUSS MicroTec is a leading supplier of equipment and process solu...
iwlpc.com
IWLPC - International Wafer Level Packaging Conference
http://www.iwlpc.com/exhibitor_info.cfm
Bridging the Interconnect Gap. October 18 - 20, 2016. San Jose, California, USA. Sponsor or Exhibit Today! View available Sponsorship and Exhibitor Opportunities. Dates: October 18-19, 2016. Location: DoubleTree by Hilton Hotel, San Jose, CA. October 19: 9:30am-3:30 pm. Why Exhibit at IWLPC? A focused international audience. In this highly competitive marketplace. And concepts to the market. With existing customers and generate new leads. View the latest floor plan. Two Free Lunches Per Day. 8' D x 10' W).
iwlpc.com
IWLPC - International Wafer Level Packaging Conference
http://www.iwlpc.com/expo.cfm
Bridging the Interconnect Gap. October 18 - 20, 2016. San Jose, California, USA. Exhibition: October 18-19, 2016. DoubleTree by Hilton Hotel, San Jose, CA. October 19: 9:30am-5:30 pm. AI Technology, Inc. Applied Materials, Inc. ASM LASER SEPARATION INTERNATIONAL. Carl Zeiss Microscopy, LLC. Conductive Containers, Inc. Cyber technologies USA, LLC. FlipChip International - Huatian. Grinding and Dicing Services Inc. Hitachi Chemical Co., Ltd. Lintec of America, Inc. Nikon Metrology, Inc. SHENMAO America, Inc.
iwlpc.com
Hotel and Travel Accommodations | IWLPC - International Wafer Level Packaging Conference
http://www.iwlpc.com/accommodations.cfm
Bridging the Interconnect Gap. October 18 - 20, 2016. San Jose, California, USA. Hotel and Travel Accommodations. DoubleTree by Hilton San Jose. Places you in the center of it all less than a half-mile from San Jose International Airport, 45 minutes from San Francisco International Airport (SFO), and an hour south of San Francisco and north of Monterey/Carmel. Incredibly close to both Santa Clara University and San Jose State University, our hotel is a great place to stay for visiting families and friends.
iwlpc.com
IWLPC - International Wafer Level Packaging Conference
http://www.iwlpc.com/index.cfm
Bridging the Interconnect Gap. October 18 - 20, 2016. San Jose, California, USA. And Chip Scale Review. Are pleased to announce the 13th Annual International Wafer-Level Packaging Conference and Tabletop Exhibition. IWLPC brings together some of the semiconductor industry's most respected authorities addressing all aspects of wafer-level, 3D, TSV, and MEMS device packaging and manufacturing. Program Finalized and Registration Now Open! View the Conference brochure (PDF) for details. October 18, 2016.
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